By Ban Wong, Anurag Mittal, Yu Cao, Greg W. Starr
A needs to learn for each customized circuit clothier engaged on 90nm and past. caution! this isn't for the amateur! A wealth of knowledge. cannot look forward to the subsequent booklet via the authors.
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Additional info for Nano-CMOS Circuit and Physical Design
To meet device requirements for the shallow junctions in the source–drain area of the transistors requires 3◦ C, 3σ temperature control. 8 Center versus edge temperature profile without active uniformity control. 2◦ C, 3σ control. (From Ref. 9 shows this level of temperature uniformity demonstrated on 300-mm wafers measured to within 3 mm of the wafer edge. RTP equipment relies on optical pyrometry for temperature measurement. Pyrometry measures the gray-body radiation emitted by the wafer itself to determine its temperature.
8×. But at an 85% germanium fraction in silicon, the band minimum switches from silicon-like to germanium-like. 6). Parallel to the growth direction the lattice constant must remain the same as that of silicon throughout the compositional change of germanium in silicon. The diamond structure of silicon or germanium lattice is now changed into a tetragonal structure with significant compressive strain parallel to the growth condition. The degree of the strain is thus related to the percent mole fraction of germanium in silicon.
The wafer causes only a small perturbation of the environment, and the wafer temperature asymptotically approaches that of the environment. To maintain temperature uniformity of 3◦ C, 3σ (three times the standard deviation of all measured points within a wafer and from multiple wafers) over the broad range of temperature required for RTP, active uniformity control is required. Due to the difference in the ratio of surface area to volume at the edge and center of a wafer, different energy distributions are required at different parts of an RTP temperature cycle.